commiting code that didnt work properly on new branch

src/analog_out.cpp

@@ -0,0 +1,16 @@
+#include <analog_out.h>
+
+Analog_out::Analog_out(int pin_number) : pin(pin_number)
+{
+}
+
+void Analog_out::init(int period_ms)
+{
+    pin.init();
+    timer.init(period_ms, 0); // Here we can choose the default duty cycle
+}
+
+void Analog_out::set(int duty_cycle)
+{
+    timer.set_duty_cycle(duty_cycle);
+}

src/motor_driver.cpp

@@ -0,0 +1,34 @@
+#include "motor_driver.h"
+#include <avr/io.h>
+
+Motor_driver::Motor_driver() : top_value(0) {}
+
+void Motor_driver::init(uint16_t top) {
+    top_value = top;
+
+    DDRB |= (1 << PB1) | (1 << PB2);   // AIN1, AIN2 
+
+    TCCR1A = 0;
+    TCCR1B = 0;
+
+    // Fast PWM, TOP = ICR1 (WGM13:10 = 1110)
+    TCCR1A |= (1 << WGM11);
+    TCCR1B |= (1 << WGM13) | (1 << WGM12);
+
+    // Non-inverting PWM (OC1A og OC1B)
+    TCCR1A |= (1 << COM1A1) | (1 << COM1B1);
+
+    ICR1  = top_value;
+    OCR1A = 0;
+    OCR1B = 0;
+
+    TCCR1B |= (1 << CS10);   // prescaler 1
+}
+
+void Motor_driver::set_duty_cycleA(int percent) {
+    OCR1A = (uint16_t)((uint32_t)top_value * percent / 100);
+}
+
+void Motor_driver::set_duty_cycleB(int percent) {
+    OCR1B = (uint16_t)((uint32_t)top_value * percent / 100);
+}

src/timer_msec.cpp

@@ -0,0 +1,33 @@
+#include <timer_msec.h>
+#include <avr/io.h>
+#include <stdint.h>
+
+Timer_msec::Timer_msec()
+{
+
+}
+
+void Timer_msec::init(int period_ms)
+{
+    init(period_ms, 50);   // calls the next function with 50% duty cycle
+}
+
+void Timer_msec::init(int period_ms, int duty_cycle)
+{
+    // this code sets up timer1 for a 1s @ 16Mhz Clock (mode 4)
+    // counting 16000000/1024 cycles of a clock prescaled by 1024
+    TCCR1A = 0; // set timer1 to normal operation (all bits in control registers A and B set to zero)
+    TCCR1B = 0; //
+    TCNT1 = 0; // initialize counter value to 0
+    OCR1A = (uint32_t {16000} * period_ms / 1024) - 1; // assign target count to compare register A (must be less than 65536)
+    OCR1B = OCR1A * (duty_cycle / 100.0); // assign target count to compare register B (should not exceed value of OCR1A)
+    TCCR1B |= (1 << WGM12); // clear the timer on compare match A
+    TIMSK1 |= (1 << OCIE1A); // set interrupt on compare match A
+    TIMSK1 |= (1 << OCIE1B); // set interrupt on compare match B
+    TCCR1B |= (1 << CS12) | (1 << CS10); // set prescaler to 1024 and start the timer
+}
+
+void Timer_msec::set_duty_cycle(int duty_cycle)
+{
+    OCR1B = OCR1A * (duty_cycle / 100.0);
+}